专利名称：Phase lock loop circuit发明人：Takeda, Koichiro申请号：EP83303503.3申请日：19830617公开号：EP0098705B1公开日：19880824
摘要：A phase lock loop circuit has a voltage controlled oscillator (7) controlled independence upon a phase error signal and a sweep signal (a) superimposed on the phaseerror signal thereby to sweep the voyage controlled oscillator (7). The circuit has means(11) operable to suspend such sweeping of the voltage controlled oscillator (7) whenphase lock is achieved and to maintain the superimposition, on the phase error signal, ofthe level of the sweep signal (a) immediately before phase lock is achieved.
申请人：FUJITSU LIMITED
代理机构：Sunderland, James Harry
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